Rewritable nano-surface organic electrical bistable devices

ABSTRACT

A bistable electrical device that is convertible between a low resistance state and a high resistance state. The device includes at least one layer of organic low conductivity material that is sandwiched between two electrodes. A buffer layer is located between the organic layer and at least one of the electrodes. The buffer layer includes particles in the form of flakes or dots of a low conducting material or insulating material that are present in a sufficient amount to only partially cover the electrode surface. The presence of the buffer layer controls metal migration into the organic layer when voltage pulses are applied between the electrodes to convert the device back and forth between the low and high resistance states.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates generally to electronic devices that utilize elements that exhibit bistable electrical behavior. More particularly, the present invention is directed to organic semiconductor devices including electrically programmable nonvolatile memory devices and switches.

2. Description of Related Art

The publications and other reference materials referred to herein to describe the background of the invention and to provide additional details regarding its practice are hereby incorporated by reference. For convenience, the reference materials are numerically referenced and identified in the appended bibliography.

Many electronic memory and switching devices typically employ some type of bistable element that can be converted between a high impedance state (off-state) and a low impedance state (on-state) by applying an electrical voltage or other type of writing input to the device. This threshold switching and memory phenomena have been demonstrated in both organic and inorganic thin-film semiconductor materials. For example, this phenomenon has been observed in thin films of amorphous chalcogenide semiconductor (1), amorphous silicon (2), organic material (3) and ZnSe—Ge heterostructures (4).

The above materials have been proposed as potential candidates for nonvolatile memories. The mechanism of electrical bistability has been attributed to processes such as field and impact ionization of traps, whereas in chalcogenide semiconductors they involve amorphous to crystalline phase changes. Analogous memory effects in the leakage current of ferroelectric BaTiO₃ or (Pb_(1-y)La_(y))(Zr_(1-x))O₃-based heterostructures have also been reported and discussed in terms of band bending due to spontaneous polarization switching. Electrical switching and memory phenomena have also been observed in organic charge transfer complexes such as Cu-TCNQ[5,6].

A number of organic functional materials have attracted more and more attention in recent years due to their potential use in field-effect transistors (7), lasers (8), memories (9,10) and light emitting diodes and triodes (11,15). Electroluminesent polymers are one of the organic functional materials that have been investigated for use in display applications. In addition to display applications, electroluminesent polymers have been doped with high dipole moment molecules in order to obtain a memory effect (12). This memory effect is observed when dipole groups attached to side chain of the polymer rotate due to application of a threshold bias voltage. Unfortunately, rotation of the dipole groups takes a relatively long time. Also, doping of the polymer reduces the electroluminescence of the doped polymer.

Electronic addressing or logic devices are presently made from inorganic materials, such as crystalline silicon. Although these inorganic devices have been technically and commercially successful, they have a number of drawbacks including complex architecture and high fabrication costs. In the case of volatile semiconductor memory devices, the circuitry must constantly be supplied with a current in order to maintain the stored information. This results in heating and high power consumption. Non-volatile semiconductor devices avoid this problem. However, they have the disadvantage of reduced data storage capability as a result of higher complexity in the circuit design, and hence higher cost.

A number of different architectures have been implemented for memory chips based on semiconductor material. These structures reflect a tendency to specialization with regard to different tasks. Matrix addressing of memory location in a plane is a simple and effective way of achieving a large number of accessible memory locations while utilizing a reasonable number of lines for electrical addressing. In a square grid with n lines in each direction the number of memory locations is n². This is the basic principle, which at present is implemented in a number of solid-state semiconductor memories. In these types of systems, each memory location must have a dedicated electronic circuit that communicates to the outside. Such communication is accomplished via the grid intersection point as well as a volatile or non-volatile memory element which typically is a charge storage unit. Organic memory in this type of matrix format has been demonstrated before by using an organic charge transfer complex. However such organic memories require transistor switches to address each memory element leading to a very complex device structure.

Organic Electrical Bistable Devices (OBD's) have been proposed in the past where a metal layer is sandwiched between two organic layers. This sandwich structure is used as an active medium that is interposed between two electrodes. Controllable memory performance has been obtained using this type of configuration. A positive voltage pulse is used for writing, while a reversed bias is used for erasing. The shortcoming of this kind of memory device is that erasure must be performed by applying a reversed bias. In an x-y electrical-addressable memory array application, a diode must be series connected with each memory cell to prevent the so-called “sneak current”. In this type of application, it is difficult to apply a reversed bias for erasing. In addition, the middle metal layer makes it technically difficult to pattern the metal layer for each memory cell when the cells are very small.

The diffusion or drift of Cu-ions into semiconductor materials, like silicon, is a well-known and troublesome phenomenon that has an adverse effect on semiconductor devices (16). Generally a diffusion barrier layer is added to prevent Cu metallization (17). Electrical-addressable nonvolatile memory devices have attracted considerable attention in recent years due to their application in information technology. Silicon based floating-gate memory (18), with a response time in the sub-millisecond, has played an important role in the modern electronic devices, such as digital cameras. However, there is always a strong demand for electronic nonvolatile memory devices that are less expensive and better. Organic electrical bistable devices are promising in this regard.

Organic electrical bistable devices with an organic/metal-nanocluster/organic tri-layer structure sandwiched between two electrodes have been made (19). These sandwich structures show nonvolatile memory behavior. Many other methods have also been reported for nonvolatile memory, such as phase change memory (20), programmable metallization cell (21), nano-crystal memory (22), organic memory based on scanning probe microscope (23), and organic memory in charge-transfer complex system (6), polystyrene films (24), and molecular devices (25).

In view of the above, there is a continuing need to provide new and improved electrically bistable structures which may be used in electronic devices, such as memory devices and switches.

SUMMARY OF THE INVENTION

In accordance with the present invention, bistable electrical devices are provided that are convertible between a low resistance (impedance) state and a high resistance (impedance) state. The bistable electrical devices are well suited for use as electrical switching and memory devices. In the present invention, we provide a new kind of organic bistable device (OBD) that utilizes a nano-surface (also referred to as a “buffer layer”) located on at least one of the electrodes. The OBD's in accordance with the present invention provide high memory performance without any of the above-mentioned technical difficulties for memory applications.

The organic bistable electrical devices of the present invention generally include a first electrode that has a first electrode surface. A layer of low conductivity organic material having a first surface and a second surface is provided wherein the first surface of the organic layer is in electrical contact with the first electrode surface. A second electrode is provided that includes a second electrode surface. As a feature of the invention, a buffer layer is located between the second electrode surface and the second surface of organic layer. The buffer layer includes particles in the form of flakes or dots of a low conducting material or insulating material that are present in a sufficient amount to only partially cover the second electrode surface. The buffer layer controls metal ion migration from the electrode and provides for the conversion of the bistable electrical device between the low resistance (“on”) state and the high resistance (“off”) state when an electrical voltage is applied between the first and second electrodes.

The present invention utilizes one or more buffer layers to control the metal ion concentration within the organic layer interposed between two metal electrodes and provide electrical programmable nonvolatile memory devices. Advantages of the memory devices of the present invention include: 1) the memory devices have no conducting layer in between the top and bottom electrodes. Therefore, it is not necessary to pattern the active layer (which is composed of one or more buffer-layers and organic layers) when making x-y memory-cell array type memory devices; 2) the write-read-erase voltage pulse can be the same direction, which is convenient in an x-y electrical-addressable memory array device. This is because in x-y array type devices, a diode must be series connected with each memory cell to prevent the sneak current. In addition, the on-state current is much higher, at 0.1 V bias, the on-state current can go to 2 A/cm². Both the On-state and Off-state are quite stable. As a result, this device is ideal for x-y array type memory and switch application.

The organic bistable electrical devices may be used to form a wide variety of memory devices wherein a memory input element is provided for applying voltage to the organic bistable device to convert the active layer between the low electrical resistance (high conductance) state and the high electrical resistance (low conductance) state. The memory device further includes a memory read-out element which provides an indication of whether the bistable body is in the low or high electrical resistance state. As a feature of the present invention, the memory read-out element may be a light-emitting diode which provides a visual indication of the electrical resistance state of the bistable body.

The above discussed and many other features and attendant advantages of the present invention will become better understood by reference to the detailed description when taken in conjunction with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1(a) is a diagrammatic representation of a bistable electrical device in accordance with the present invention that utilizes one buffer layer. FIG. 1(b) is a diagrammatic representation of a bistable electrical device in accordance with the present invention that utilizes two buffer layers. FIG. 1(c) is a diagrammatic representation of a bistable electrical device in accordance with the present invention that utilizes three buffer layers.

FIG. 2 is a graph of the typical I-V characteristics of a Cu/LiF/AIDCN/Cu device in accordance with the present invention that is initially in the Off-state. The switching-on voltage ranges from V_(c1) to V_(c2). The switching-off voltage is higher than V_(c2). The read voltage is the less than V_(c1).

FIG. 3 is a graph of the I-V characteristics of On-state and Off-state for devices in accordance with the present invention. The reading voltage is 0.2 V and the On/Off ratio is about 7 orders in magnitude.

FIG. 4(a) is a scanning tunneling microscope image of the surface of a 10 μm×10 μLiF buffer layer (2.5 nm thickness). FIG. 4(b) is a scanning tunneling microscope image of the surface of a 1 μm×1 μm copper layer (100 nm thickness).

FIG. 5 is a schematic diagram of the measurement system used to measure transient responses of exemplary Cu-OBD's in accordance with the present invention.

FIG. 6(a) is a graph of the transient response of an exemplary Cu-OBD from the Off-state to On-state. The response of the device was measured by using a 50 Ohm read resistor. The response time is about 28 ms. FIG. 6(b) is a graph of the transient response of the On-state of an exemplary Cu-OBD. The applied voltage pulse was 0.38V and 100 ns. The device response was measured using a 50 Ohm resistor.

FIG. 7(a) is a graph of the transition speed of an exemplary Cu-OBD from the low resistance state to the high resistance state. The “applied pulsed” curve represents the applied voltage pulse. The “device response” curve stands for the device response from On-state to Off-state by a 50 Ohm read resistor. The two current peaks are caused by the capacitor effect (charging and discharging) of the off-state device.

FIG. 7(b) is a graph of the dynamic response of an exemplary Cu-OBD (initially at On-state) to an applied sharp voltage pulse (3.5 V peak 20 ns half-height width). The response of the Cu-OBD was measured using 50 Ohm read resistor. The negative peak indicates that the device already changed to the off state. The transition process is so fast that it could not be recognized by our current measurement systems.

FIG. 8 is a graph of the transient response of both the On-state and Off-state of an exemplary Cu-OBD. The On-state response follows the applied pulse shape, while the Off-state shows a discharging effect which can be used to determine the device status.

FIG. 9(a) is a graph of the frequency dependence of capacitance of an exemplary Cu-OBD in the On-and-Off states. FIG. 9(b) is a graph of the frequency dependence of the phase angle of impedance of an exemplary Cu-OBD in the On-and-Off states.

FIG. 10 is a schematic diagram of the circuit model used for calculating the devices' capacitance. The capacitance of the measurement system is less than 0.01 pF and is therefore omitted.

FIG. 11 is a graph of the frequency-dependence of the imaginary part of the impedance for the On-state of an exemplary Cu-OBD. The line in the graph is the fitting results using formula (3) to fit the experimental data. The device's capacitance was determined to be about 0.3 pF which is the same as the direct measurement shown in FIG. 9(a).

FIG. 12 is a graph of the frequency-dependence of the imaginary part of the impedance for the Off-state of an exemplary Cu-OBD. The line in the graph is the fitting results using formula (4) to fit the experimental data. The device's capacitance was determined to be about 116 pF which is the same as the direct measurement shown in FIG. 9(a).

FIG. 13(a) is a schematic diagram of an equivalent circuit for the off-state exemplary Cu-OBD (pure capacitor model). FIG. 13(b) is a schematic diagram of an equivalent circuit for the on-state exemplary Cu-OBD from conducting filament formation. The resistor in FIG. 13(b) is the filament's resistance.

FIG. 14 is a graph of the frequency-dependence capacitance of an Off-state exemplary Cu-OBD with a resistor (mimics conducting filaments) parallel connected to the Cu-OBD. The capacitances with different values of parallel-connected resistors are the same as single Off-state Cu-OBD's (about 100 pF). This demonstrates the On-state of the exemplary Cu-OBD is not a result of filament formation.

FIG. 15(a) is a graph of the on-state I-V characteristics for an exemplary Cu-OBD with various active layer areas. The bold arrow represents an increase in area. The “+” line is 2 mm²; the “solid triangle” line is 1 mm²; the “open square” line is 0.5 mm²; and the “solid square” line is 0.25 mm². FIG. 15(b) is a graph of the area-dependence of the on-state current at 0.2 V bias.

FIG. 16 is graph of the I-V characteristics of two exemplary Cu-OBD's with the same LiF layer thickness (2.5 nm), but different organic-layer thickness (45 nm, closed circles, and 100 nm, open circles, respectively). The On/Off ratios for the thicker and thinner devices are 10⁸ and 10³, respectively.

FIG. 17(a) is a graph of the I-V behavior of an exemplary Cu-OBD at 80, 160, 220, 250 and 300° K. When the temperature below 250 K the device exhibit non-linear I-V characteristics. Below the switching bias voltage (about 0.92 V), the none-linear I-V curves at the different temperature overlap. The switching voltage is the same at 250 and 300 K. FIG. 17(b) is a graph of the On-state I-V curves of an exemplary Cu-OBD at 80, 250 and 300 K. The measurement sequence is, first 300° K, then cool down to 80 K, then heating to 250 K.

FIG. 18 is a graph of the cycles test for an exemplary Cu-OBD. At first, the device was in the On-state. An erase voltage pulse was applied so that the device changed to Off-state. The data shown graphically depicts a number cycles between On-and-Off states with the current measured at 0.2 V bias. The stability of the On-state was tested by leaving the device alone for increasing amounts of time (such as 2 hours, 2 days) without any bias, and then measuring current through the device. The device still remained at the On-state as shown in FIG. 18. The On-state can be erased to the Off-state for continued cycles test. The Off-state of the exemplary Cu-OBD was also stable.

FIG. 19 is a graph of the cycles test for an exemplary Cu-OBD (Cu/LiF(2.5 nm)/AIDCN(45 nm)/Cu). A 3V voltage pulse was used for “switch-off” and a 1.2 V voltage pulse was used for “switch-on”. The current was read at 0.2 V bias.

FIG. 20 is a graph of the heating-treatment and cycles test for an exemplary Cu-OBD. The Off-state current decreases (about 2 orders in magnitude) after heating treatment. The heating treatment has no effect on the On-state current of the device. This heating effect of the Off-state current can only be observed for devices with relatively thinner AIDCN layers in which the Off-state current is relatively high. This is another method for decreasing the Off-state current of Cu-OBD's.

FIG. 21 (a) is a graph of the I-V characteristics of an exemplary Cu-OBD for write-read-erase real time dynamic cycles test. FIG. 21(b) is a graph of the real time dynamic Write-Read-Erase cycle test of an exemplary Cu-OBD.

FIG. 22(a) is a SIMS Cu⁺ depth profile of an exemplary Cu-OBD. FIG. 22(b) is a SIMS Cu depth profile of an exemplary Cu-OBD. The On-state is caused by high Cu⁺ concentration within the organic layer.

DETAILED DESCRIPTION OF THE INVENTION

An organic bistable electrical device in accordance with the present invention is shown in FIG. 1. The device includes an organic layer 4 that is sandwiched between a first electrode 5 and a second electrode 2. The organic layer 4 is shown in the form of a layer. However, it will be understood that the organic layer can be provided in any number of different shapes. Organic layers in the form of a thin layer or film are preferred since fabrication techniques for forming thin films are well known.

The organic layer 4 includes a first surface that is in electrical contact with the first electrode 5. The organic layer 4 includes a second surface that is located on the other side of the organic layer 4 and which is in electrical contact with the second electrode 2. The second electrode 2 is typically located on an insulating substrate 1. If desired, the substrate 1 can be either ridged or flexible and made from either organic or inorganic materials that are well-know for use as insulating substrates in electronic devices.

In accordance with the present invention, a buffer layer 3 is provided between the second electrode 2 and the organic layer 4 to provide control of metal ion migration into the organic layer 4. The buffer layer 4 on the anode side is used for a number of purposes. For example, the buffer layer 4 is used to control metal ion injection from the anode by decreasing the metal ion injection barrier at a proper applied voltage pulse (V_(c1)<V<V_(c2)) condition to realize the switch-on process. Another purpose is to control metal ion injection from the anode by increasing the copper ion injection barrier at higher applied voltage pulse condition (V>V_(c2)) to realize the switch-off process. Another purpose is to control metal ion injection from the anode by keeping the metal ion injection properties (either no injection for Off-state or injection for On-state) at a low applied voltage pulse condition to realize the read process. If desired, the switch-off process can be defined as the writing-process, while the switch-on process can be defined as the erasing process.

The organic bistable electrical device (OBD) is typically connected to an electronic control unit via electrical connections to the electrodes (not shown). The control unit is capable of providing an electrical voltage bias across the organic layer 4 via the two electrodes 2 and 5 to convert the OBD between low resistance (On) and high resistance (Off) states. In addition, the control unit is capable of, among other things, measuring current to determine the electrical resistance of the OBD.

The materials for the electrodes 2 and 5 can be metals or conducting materials like indium tin oxide (ITO). Suitable metals for use as the electrodes include copper (Cu), gold (Au), silver (Ag), aluminum (Al) and other metals that have relatively high diffusion coefficients in the organic layer. Copper is a preferred electrode material with devices utilizing at least one copper electrode being referred to as a “Cu-OBD”. Either electrode can be the anode provided that it is copper or a similar metal as set forth above.

The materials for the buffer layer should be insulating or low conducting materials. A variety of low conducting or insulating materials may be used to form the particles (in the form of insulating dots or flakes) that make up the buffer layer. For example, LiF, NaCl and other compounds similar to LiF and NaCl may be used. Such compounds typically form flakes. Metal oxides, such as aluminum oxide (Al₂O₃), may be used. These compounds typically form dots. The thickness of the buffer layer is preferably from 1 to 10 nm thick with 2-5 nm being especially preferred. The thickness of the buffer layer can be as great as 50 nm, if desired.

The buffer layer is composed of small dots or flake-like deposits which are important for the observed electrical bistable behavior. It is preferred that the insulating dots or flakes substantially cover the electrode surface. However, some open spaces should remain between the dots or flakes. FIG. 4(a) is an STM image of a 10×10 μm² section of a buffer layer which shows LiF flakes on a copper surface. FIG. 4(a) shows what is meant by “substantially” covering the electrode surface. The degree of surface coverage and size of the flakes may be varied from what is shown in FIG. 4(a) provided that the desired properties provided by the buffer layer are not destroyed. The degree of surface coverage and flake or dot size is related to the thickness of the buffer layer. In general, the thicker the buffer layer, the larger the degree of coverage, and the surface morphology may be varied too.

The materials for the organic layer are preferably small conjugated low conductivity organic materials. Suitable low conductivity materials include organic semiconductors. Exemplary organic semiconductors include small molecular organic materials such as 2-amino-4,5-imidazoledicarbonitrile (AIDCN); tris-8-(hydroxyquinoline)aluminum (Alq); 7,7,8,8-tetracyanoquinodimethane (TCNQ); 3-amino-5-hydroxypyrazole (AHP); tris-(8-hydroxyquinolinolato) aluminum (Alq3); and copper or zinc 2,9,16,23-tetra-tert-butyl-29H,31H-phthalocyanine (CuPc or ZnPc). If desired, inorganic materials like silicon, gallium, gallium nitride and similar semi-conductors may be used in place of the organic layer. The so-called “organic layer” is typically from 10 to 1000 nm thick.

The various electrodes, organic layers and buffer layers that make up the organic bistable devices of the present invention can be fabricated by vacuum thermal evaporation methods, spin-coating or continuous-coating techniques which are all well-known in the electronic device manufacturing field.

Referring to FIG. 2, a second exemplary OBD device is shown wherein buffer layers 3 are provided between the organic layer 4 and both electrodes 2 and 5. In FIG. 3, a third alternate embodiment is shown wherein two organic layers 4 are sandwiched between electrodes 2 and 5. Three buffer layers 3 are used to separate the two organic layers 4 from each other and to separate the electrodes 2 and 5 from the organic layers. As is apparent, a number of different combinations of organic layers with buffer layers and electrodes are possible.

Examples of practice are as follows:

In the following examples, a number of OBD's were made and tested. The basic structure of the exemplary devices is shown in FIG. 1. Cu was selected for the electrodes due to its high diffusion coefficient (25). The buffer layers were approximately 4 μm thick (unless otherwise noted) and included dielectric materials, such as lithium fluoride (LiF) and aluminum oxide. Materials with low conductivity, good film formability and stability such as 2-amino-4,5-imidazoledicarbonitrile (AIDCN), tris-8-(hydroxyquinoline) aluminum (Alq₃), and Zinc 2,9,16,23-tetra-tert-butyl-29H,31H-phthalocyanine (ZnPc) were selected for the organic layers.

The OBD's of the present invention can be fabricated by simple vacuum thermal evaporation methods, spin-coating or continuous-coating techniques. The Cu-OBD's in these examples were fabricated by vacuum thermal evaporation methods. All the depositions were performed in a high vacuum about 1×10⁻⁶ torr. A preferred process includes depositing all films for device fabrication without breaking the vacuum.

The buffer layer controls Cu ions injection into the organic layer at various applied voltages. At a low critical voltage pulse V_(c1) (generally, ranging from 0.2 to 3 V) it allows Cu ions injection from the anode into the organic layer, which switches the device to high conductance state (On-state), while above a relative high critical voltage V_(c2) (generally above 3 V in 10 nanoseconds width) it can shut down Cu ions injection and restore the device to low conductance state (Off-state). The two states differ in their electrical conductivity by several orders (3-9) of magnitude depending on the device fabrication processing, and can be precisely switched by controlling the Cu⁺ concentration through the application of external voltage pulses. A small voltage pulse (less than 0.1V, ten nanoseconds width) can be used to read. At no bias condition both On-state and Off-state are quite stable even being heated to 110° C., which makes it suitable for nonvolatile memory application. The On-state current density of the device is quite high (˜2 A/cm² @ 0.1V bias). The devices are especially well suited for flash memory applications and for driving light-emitting pixels in display applications.

FIG. 2 shows the typical I-V characteristics of the Cu-OBDs when the device is initially in the Off-state (high impedance), the high conductive state can be excited by a voltage V (V_(c1)<V<V_(c2))). Higher voltage (V>V_(c2)) can restore the device to the Off-state. The Off-state is stable if the following applied voltage is less than V_(c1). Once the device is excited by the small voltage to the On-state, it will remain at the On-state for prolonged periods of time if the following applied voltage is less than V_(c2). Therefore, we can use very small voltage (0.1 or 0.2V) to read the On-state and Off-state. The On-Off ratio of the devices can be as high as 7 orders in magnitude (See FIG. 3).

It is believed that the OBD devices operate according to the following principles. Copper that diffuses into other materials is in a positively charged state (26), and the copper ions drift in both silicon (27) and organic materials (28), and cause copper metallization. Generally diffusion barrier layers are used to prevent this metallization (29). The diffusion barrier provides an interface adhesion (or an energy barrier) to prevent Cu⁺ diffusion and metallization (30). For Cu-OBD's, when positive bias is applied, copper is ionized at the inner-face of the anode and acts as the Cu⁺ source. When the energy of Cu⁺ is high enough (larger than eV_(c1)) to overcome the energy barrier, they are injected into the organic layer, and drift towards the cathode. When the Cu⁺ ions reach the cathode, a continuous Cu⁺ distribution within the organic layer is established where the organic layer is metallized by the Cu⁺ and exhibits the ON-state. This is also consistent with the delay time during the switch-ON process as shown later in FIG. 7(a). Providing the delay time is solely caused by the Cu⁺ traveling time through the organic layer, one can estimate that the drift velocity of Cu⁺ in AIDCN film is about 5×10⁴ cm/s under the electric field of 1.2×10⁵ V/cm, and the diffusivity of Cu⁺ in AIDCN film is about 10⁻¹⁰ cm²/s at room temperature, which is smaller than in case of silicon (about 10⁻⁷ cm²/s) (31). By selecting organic materials with a relatively high Cu⁺ diffusion coefficient, faster switch-ON speeds can be expected.

For Cu-OBDs, when the applied bias is over the second critical voltage (V_(c2)), it undergoes the switch-OFF process and the device changes to the OFF-state (FIG. 2), which indicates that Cu⁺ injection is prohibited while the residual Cu⁺ within the organic layer drift towards the cathode and is reduced to Cu. Once a gap larger than a percolation threshold is formed within the organic layer where the Cu⁺ is free, the device will be switched OFF. The rest of Cu ions will continuously drift towards the cathode until no Cu ions remain within the organic layer. Hence, the transition speed from On-state to Off-state is very fast. One possibility of no Cu⁺-injection at a bias voltage larger than V_(c2) may be due to the dipole alignment of the buffer layer. Since high dipole moment materials are used for the buffer layer, when the applied electric field is high enough, dipole alignment may happen (32), which tremendously increases the energy barrier and prohibits Cu⁺ injection. The polarized dipoles may restore to a random orientation when the bias is removed (33), allowing the rewritable character of the devices.

The surfaces of the LiF buffer layer and Cu electrodes were investigated by using a scanning tunneling microscope (STM). FIG. 4(a) shows the STM image of an LiF layer with 2.5 nm in thickness on a pre-deposited Cu substrate. It can be seen from FIG. 4(a) that the deposited LiF layer of dots is flake-like, which is important for the observed electrical bistable behavior. FIG. 4(b) shows the STM image of the surface of the deposited Cu electrode layer. It can be seen from FIG. 4(b) that the surface of the Cu layer is quite smooth compared with the LiF layer, which indicates that the surface structure of LiF shown in FIG. 4(a) is caused by LiF itself and not the Cu surface morphology. It is preferred that the insulating dot or flakes substantially cover the electrode surface, but that some open spaces remain between the dots or flakes. FIG. 4(a) shows what is meant by “substantially” covering the electrode surface. The degree of surface coverage may be varied from what is shown in FIG. 4(a) provided that the desired properties provided by the nano-layer are not destroyed. The thickness of the flake or dot layer can range from 1 to 50 nanometers. Thickness on the order of 2 to 5 nanometers is preferred.

The transition speed of the Cu-OBDs from both the high-resistance state to low resistance state and from the low-resistance state to the high-resistance state is measured by transient measurement. The measurement setup is shown in FIG. 5. The transition speed of the On-to-Off state is relatively slow, about several ten milliseconds. FIG. 6(a) shows the transient response of a Cu-OBD from the Off-state to the On-state. It can be seen from FIG. 6(a) that when the voltage pulse is applied to the device, the device initially keeps its high-resistance state. After about a 28 ms delay time, the device jumps to low-resistance state. The real transition speed from high to low resistance state is quite small as shown by in FIG. 6(a). The tens of milliseconds delay time indicates that Cu⁺ ions travel from the anode to the cathode. The electrical behavior of the On-state Cu-OBD is like a pure resistor. The transient electrical behavior of the On-state Cu-OBD is shown in FIG. 6(b). It can be seen from FIG. 6(b) that no capacitor effects (charging and discharging) are observed for the on-state Cu-OBDs. The current follows the applied voltage pulse, which indicates that the on-state Cu-OBDs exhibits pure resistor behavior. This conclusion is confirmed by the impedance measurements set forth below.

The transition speed from the On-to-Off state of the Cu-OBDs was shown to be quite fast. It is less than 10 ns, which is within the limitation of our measurement system. By applying a relatively high voltage pulse (about 3 volts) to the device, the device can change its state from low resistance to high resistance in less than nanoseconds. FIG. 7(a) shows the transient response of an exemplary Cu-OBD (initially at the low resistance state) to an applied voltage pulse. Before doing this transition speed measurement, DC I-V curve measurements were taken to make sure the device was initially at the low resistance state. The transition speed from low resistance state to high resistance state is less than nanoseconds. Therefore, a narrow voltage pulse can be used to excite the devices from the on state to the off state. FIG. 7(b) shows the dynamic response of Cu-OBDs (initially at On-state) to a very sharp voltage pulse.

The transient response of On-state and Off-state of Cu-OBDs to a very sharp applied voltage pulse is quite different as shown in FIG. 8. It can be seen from FIG. 8 that the current response of the On-state device follows the applied voltage pulse very well, while a negative peak can be seen clearly in the Off-state device response. This is the capacitor discharging effect of the Off-state devices. Therefore, very short voltage pulses (less than 20 ns) can be used for reading. The reading time of a typical Cu-OBD can be less than 20 ns. By further decreasing the device area, the speed of the device will be much faster as the capacitance of the device decreases.

Impedance measurements were carried out using an HP 4284A LCR meter. The frequency dependence of the device's capacitance is shown in FIG. 9(a). If can be seen from FIG. 9(a) that the Off-state devices' capacitance is about 100 pF, while the On-state devices' capacitance is about 0.3 pF. The capacitance decreased more than 2 orders in magnitude after the device was switched from Off-state to On-state.

The phase of the impedance for Cu-OBD at both the On-state and the Off-state are shown in FIG. 9(b). It can be seen from FIG. 9(b) that the phase is nearly zero for the device in the On-state indicating a pure resistor case. The phase for the device at the Off-state is nearly −90°, indicating a pure capacitor case. The capacitance data shown in FIG. 9(a) is directly measured by a CPCR mode of the LCR meter. To confirm this data, frequency-dependence impedance data were also measured, from which capacitance can be calculated by a circuit model shown in FIG. 10. The impedance of this circuit is $\begin{matrix} {Z = {{Rs} + \frac{r}{1 + {r^{2}\omega^{2}c^{2}}} - {{\mathbb{i}}{\frac{\omega\quad{cr}^{2}}{1 + {r^{2}\omega^{2}c^{2}}}.}}}} & (1) \end{matrix}$

When 1/(ωc)>>r, for Cu-OBDs at On-state case, $Z = {R + \frac{r}{1 + {r^{2}\omega^{2}c^{2}}} - {{\mathbb{i}}\quad r^{2}\omega\quad{c.}}}$

Therefore, for On-state Cu-OBDs, the imaginary part of impedance is proportional to the frequency f (Hz): Z _(o) sin(θ)=−2πr ² cf.  (3) Here, Z_(o) is the amplitude of impedance.

When 1/(ωc)<<r, for the Off-state of Cu-OBD case, the imaginary part of impedance is proportional to 1/f, Z _(o) sin(θ)=−1/(2πcf).  (4)

FIG. 11 shows the frequency-dependence of the imaginary part of the impedance of the On-state CU-OBD. Using formula (3) to fit the experimental data, the device's capacitance was determined to be about 0.3 pF.

Using formula (4) to fit the imaginary part of impedance for Off-state Cu-OBD, the Off-state capacitance of the device can be obtained. FIG. 12 shows the frequency-dependence of the imaginary part of the impedance of the Off-state Cu-OBD. The device's capacitance was determined to be about 116 pF which is the same as the direct measurement shown in FIG. 9(a).

It apparent from the above that an Off-state Cu-OBD behaves as a pure capacitor. If the On-state of Cu-OBDs is caused by conducting filament formation, the area of the filaments should be much smaller than the device's area. Generally the diameter of the filaments is in the micrometer range and has a certain resistance. Therefore, the formation of conducting filaments in the device should not change the capacitance of the device. Instead, it is equivalent to a resistor that is parallel connected to the device's capacitance. FIG. 13 shows the equivalent circuit of the On-state from a conducting filament formation point of view.

A resistor was parallel connected to an Off-state Cu-OBD, by changing the resistance of the resistor from 160 Ohm to 100 kOhm to mimic the possible resistance of the conducting filament. The capacitance of the device was then measured. As expected, the paralleled resistor (the formation of conducting filament) doesn't change the capacitance of the device. FIG. 14 shows the frequency-dependence capacitance of an Off-state Cu-OBD with a resistor parallel connected to it. The capacitances with different values of parallel-connected resistors are the same as single Off-state Cu-OBDs (about 100 pF). As shown in FIG. 9(a) and FIG. 11, the capacitance of the On-state Cu-OBD is much smaller than the Off-state Cu-OBD (more than two orders). Therefore, the section of conducting path for On-state device is the same as the device's area. This would not be the case for filament formation for On-state Cu-OBDs. Generally, the On-state current has little, if any, relation with the device's area if conducting filament formation is involved. The On-state I-V characteristics for Cu-OBDs with various devices' area are shown in FIG. 15(a). The area-dependent of On-state current at 0.2 V bias is shown in FIG. 15(b). The On-state current at the same bias is nearly proportional to the devices' surface area.

The On/Off ratio is an important factor for device's application. The Off-state current of the devices may not be low enough. Therefore, determining how to decrease the leakage current and increase the On/Off ration is very important. By changing the thickness of the buffer layer (LiF) and the organic layer (AIDCN). It was found that about 2.5 nm for LiF layer and about 100 nm for the AIDCN layer is the preferred condition to obtain the highest On/Off ratio. Up to now, a 10⁸ On/Off ratio has been achieved for Cu-OBDs. By decreasing the thickness of the organic layer, the Off-state current will go up, leading to a decrease in the On/Off ratio. FIG. 16 shows the I-V characteristics of two Cu-OBDs with the same LiF layer thickness (2.5 nm) but different Organic layer thickness (45 and 100 nm respectively). The opened circles represent the data for the Cu-OBD with a thicker AIDCN layer (100 nm). For this device, the On/Off ration can reach as high as 10⁸. In fact, the Off-state current is within the limitation of the measurement system. The closed circles stand for the data for the Cu-OBD with a thinner AIDCN layer (45 nm). For this device, the On-state current is a little higher, but the Off-state current is much larger than the thicker one. The On/Off ratio for the Cu-OBD with 45 nm-thicknes AIDCN layer is just above 10³.

To investigate the low temperature behavior of the exemplary Cu-OBD's, a PDF-475 dewar was used to study the I-V behavior from 80° K to 300° K. It was found that below 250° K, the devices are difficult to be triggered from the Off-state to the On-state. FIG. 17(a) shows the I-V behavior of a Cu-OBD at 80, 160, 220, 250 and 300° K. When the temperature below 250° K, the device exhibits non-linear I-V behavior. Below the switching bias voltage (about 0.92 V), the none-linear I-V curves at the different temperature overlapped. At temperature above 250° K the devices can be switched between On-Off states. The switching voltage is the same at 250 and 300° K

The On-state I-V curves at 80, 250 and 300° K are shown in FIG. 17(b). First the On-state I-V curve at 300° K was measured, then the device was cooled down to 80° K, where the device remained in the On-state. After measuring the On-state I-V characteristics at 80° K, the device was switched to the Off-state by applying a 4V voltage pulse. After being heated to 250° K, the device again was switched to the On-state by applying a voltage pulse (1V). Then the On-state I-V characteristics at 250° K were measured. It can be seen from FIG. 17(b) that there is some thermal hysteretic behavior. The On-state of CU-OBDs has a linear I-V relation, indicating that the charge transport in the On-state of the Cu-OBD is not a hopping process. Although the Off-state I-V characteristics are non-linear, they are weakly temperature-dependent. Before a switch-on voltage is applied, the non-linear I-V behavior is temperature-independent. At 2 V bias, the Off-state current increases only about 15% when the temperature of the device increased from 80 to 220° K If charge transport is a thermal hopping process, then the activation energy, E_(a) (I=I_(o) exp(−E_(a)/(kT)) is calculated to be 1.6 meV, which is quite small, even compared with 80 K (6.9 meV).

The exemplary Cu-OBD's that were prepared were found to be non-volatile rewritable memory devices. Once a Cu-OBD is switched to either state, it remains at that state without any bias applied for a long time (more than months). In write-read-erase-read (WRER) cycles test, a 3 V voltage pulse was used for erase, a 1.2 V voltage pulse for write, and a 0.2 V voltage bias for reading. FIG. 18 shows the cycles test for an exemplary Cu-OBD. It should be noted that this cycles test is not a time-dependent dynamic cycles test. The real-time dynamic cycles test will be set forth below. At first, the device was in the On-state with an erase voltage pulse being applied to change the device to the Off-state. The data shown on FIG. 18 is cycle-number dependent On-and-Off states current at 0.2 V. The stability of the On-state was tested by leaving it alone for some time (such as 2 hours, 2 days) without any bias, then measuring it again. It still remained at the On-state as shown in FIG. 18. The On-state certainly can be erased to the Off-state for continued cycles test. The Off-state of Cu-OBDs is also stable. When the device was switched to the Off-state and kept in vacuum chamber for 37 days, it was still at the Off-state and could be switched to the On-state for further continuous cycles testing (see the last three dots at the right side of FIG. 18).

FIG. 19 shows another Cu-OBD (Cu/LiF(2.5 nm)/AIDCN(45 nm)/Cu) cycles test. 3V was used for erase, 1.2 V for write, and the current was read at 0.2 V bias. It can be seen from FIG. 19 that the On-state current is nearly the same during the cycles test, but the Off-state current shows decreasing tendency during cycles test.

The above stability tests were performed at room temperature. A further demonstration of the properties of devices in accordance with the present invention involved heating the device and checking the device's state (On, or Off state) before and after heating treatment. FIG. 20 shows the heating-treatment and cycles test. First, the device was at On-state, as shown by the first dot in FIG. 20, then it was heated to 110° C. for 1 minute. After this heating treatment, it was still at the On-state as shown by the second dot in FIG. 20. Then, a 3 V voltage pulse was applied to restore it to the Off-state. The third dot in FIG. 20 shows that the device was successfully restored to the Off-state that was then switched to On-state again by applying a 1.2 V voltage pulse as confirmed by the fourth dot in FIG. 20. The device was heated again at 110° C. for 2 minutes, 10 minutes, and even 1 hour. The On-state still remained and could be restored to the Off-state after applying an erase voltage pulse. The stability of Off-state of Cu-OBDs is also stable during and after heating treatment as indicated by dot Nos. 6-7 and 10-11.

It can be seen from FIG. 20 that the Off-state current decreases substantially (about 2 order in magnitude) after heating treatment, while heating treatment has no effect on the On-state current of the device. This Heating effect of the Off-state current can only be observed for devices with relatively thinner AIDCN layer in which the Off-state current is relatively high. This is another method for decreasing the Off-state current of Cu-OBD's.

A Keithley 2400 was used to apply programmable voltage pulses in order to conduct WRER cycles tests. The typical WRER cycles cell are shown in FIGS. 21(a) and (b). FIG. 21(a) is the I-V characteristics for the cycles-test Cu-OBD. FIG. 21(b) is the real time dynamic cycles test.

It is believed that in accordance with the present invention, the On-state and Off-states are due to the Cu⁺ distribution and subsequent metallization and de-metallization or the organic layer as controlled by the buffer layer. This belief is supported by the secondary ion mass spectrometry (SIMS) depth profile measurement for Cu⁺ ion and Cu atom in exemplary devices in both states. It was found that Cu⁺ ion are driven into the organic layer in the On-state (metallization process), while Cu⁺ ions drifted out of the organic layer in the Off-state as shown in FIG. 22(a) (de-metallization process). Therefore, the ON-and-OFF states can be switched back and forth by controlling the Cu⁺ ion distribution profile within the organic layer. The atomic Cu distribution in the Cu-OBDs (FIG. 22(b)) was found to be low within the organic layer for both of the states. Accordingly, the dynamic Cu⁺ concentration within the organic layer is believed to be responsible for the observed bistability of Cu-OBDs.

Having thus described exemplary embodiments of the present invention, it should be noted by those skilled in the art that the within disclosures are exemplary only and that various other alternatives, adaptations and modifications may be made within the scope of the present invention. The buffer layers (nanosurfaces) of the present invention may be used in a wide variety of bistable devices as an interface between the electrode and the organic bistable layer. For example, the active layer of the present OBD's (organic layer plus one or more buffer layers) may be used to replace the bistable bodies in devices of the type described in PCT Application No. US01/17206. Accordingly, the present invention is not limited to the above preferred embodiments and examples, but is only limited by the following claims.

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1. A bistable electrical device that is convertible between a low resistance state and a high resistance state, said device comprising: a first electrode that includes a first electrode surface; a layer of organic low conductivity material having a first surface and a second surface wherein said first surface of said organic layer is in electrical contact with said first electrode surface; a second electrode that includes a second electrode surface; and a buffer layer located between said second electrode surface and the second surface of said organic layer, said buffer layer comprising particles of a low conducting material or insulating material that are present in a sufficient amount to only partially cover said second electrode surface and wherein said buffer layer is sufficient to provide conversion of said bistable electrical device between said low resistance state and said high resistance state when an electrical voltage is applied between said first and second electrodes.
 2. A bistable electrical device according to claim 1 wherein said buffer layer is from 1 nanometer to 50 nanometers thick.
 3. A bistable electrical device according to claim 2 wherein said buffer layer is from nanometers to 10 nanometers thick.
 4. A bistable electrical device according to claim 1 wherein said buffer layer comprises particles of a low conducting material or insulating material that substantially covers said second electrode surface.
 5. A bistable electrical device according to claim 1 wherein said particles comprise a low conducting material or insulating material selected from the group consisting of sodium chloride, lithium fluoride and aluminum oxide.
 6. A bistable electrical device according to claim 1 wherein said organic low conductivity material is selected from the group consisting of organic semiconductors.
 7. A bistable electrical device according to claim 6 wherein said organic low conductivity material is 2-amino-4,5-imidazoledicarbonitrile.
 8. A bistable electrical device according to claim 7 wherein said particles comprise a low conducting or insulating material selected from the group consisting of sodium chloride, lithium fluoride and aluminum oxide.
 9. A bistable electrical device according to claim 1 that further includes a diode connected to at least one of said first or second electrodes.
 10. A bistable electrical device according to claim 9 wherein said diode is a light emitting diode.
 11. A method comprising the step of applying a sufficient electrical voltage across the first and second electrodes of the bistable device according to claim 1 to convert said device between said high resistance state and said low resistance state.
 12. A method for making a bistable electrical device comprising the steps of: providing a first electrode that includes a first electrode surface; providing a layer of organic low conductivity material having a first surface and a second surface wherein said first surface of said organic layer is in electrical contact with said first electrode surface; providing a second electrode that includes a second electrode surface; and providing a buffer layer located between said second electrode surface and the second surface of said organic layer, said buffer layer comprising particles of a low conducting material or insulating material that are present in a sufficient amount to only partially cover said second electrode surface and wherein said buffer layer is sufficient to provide conversion of said bistable electrical device between said low resistance state and said high resistance state when an electrical voltage is applied between said first and second electrodes.
 13. A method for making a bistable electrical device according to claim 12 wherein said buffer layer is provided by depositing said particles of a low conducting material or insulating material onto said second electrode surface.
 14. A method for making a bistable electrical device according to claim 12 wherein said buffer layer is from 1 nanometer to 50 nanometers thick.
 15. A method for making a bistable electrical device according to claim 14 wherein said buffer layer is from 1 nanometers to 10 nanometers thick.
 16. A method for making a bistable electrical device according to claim 12 wherein said particles of a low conducting material or insulating material substantially covers said second electrode surface.
 17. A method for making a bistable electrical device according to claim 12 wherein said particles comprise a low conducting material selected from the group consisting of sodium chloride, lithium fluoride and aluminum oxide.
 18. A method for making a bistable electrical device according to claim 12 wherein said organic low conductivity material is selected from the group consisting of organic semiconductors.
 19. A method for making a bistable electrical device according to claim 18 wherein said organic low conductivity material is 2-amino-4,5-imidazoledicarbonitrile.
 20. A method for making a bistable electrical device according to claim 19 wherein said particles comprise a low conducting material or insulating material selected from the group consisting of sodium chloride, lithium fluoride and aluminum oxide.
 21. A method for making a bistable electrical device according to claim 12 that includes the further step of connecting a diode to at least one of said first or second electrodes.
 22. A method for making a bistable electrical device according to claim 21 wherein said diode is a light emitting diode.
 23. A memory device comprising: A) a bistable electrical device comprising: a first electrode that includes a first electrode surface; a layer of organic low conductivity material having a first surface and a second surface wherein said first surface of said organic layer is in electrical contact with said first electrode surface; a second electrode that includes a second electrode surface; and a buffer layer located between said second electrode surface and the second surface of said organic layer, said buffer layer comprising particles of a low conducting material or insulating material that are present in a sufficient amount to only partially cover said second electrode surface and wherein said buffer layer is sufficient to provide conversion of said bistable electrical device between said low resistance state and said high resistance state when an electrical voltage is applied between said first and second electrodes; B) a memory input element for applying a voltage to said bistable electrical device to convert said bistable electrical device between said low electrical resistance state and said high electrical resistance state; and C) a memory readout element which provides an indication of whether said bistable electrical device is in said low electrical resistance state or said high electrical resistance state.
 24. A memory device according to claim 23 wherein said memory readout element is a light emitting diode.
 25. A bistable electrical device according to claim 1 wherein said nano-dot layer is from 1 nanometer to 50 nanometers thick.
 26. A bistable electrical device according to claim 2 wherein said nano-dot layer is from 1 nanometers to 10 nanometers thick.
 27. A method for operating a memory device according to claim 23 comprising the step of applying a sufficient electrical voltage across said first and second electrodes of said memory device to convert said bistable electrical device between said high resistance state and said low resistance state. 